(China (Mainland))
Product Summary
The GAL26CV12B-15LP is a High Performance E2CMOS PLD. Expanding upon the industry standard 22V10 architecture, the GAL26CV12B-15LP eliminates the learning curve typically associated with using a new device architecture. The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. The GAL26CV12B-15LP OLMC is fully compatible with the OLMC in standard bipolar and CMOS 22V10 devices. The applications of the GAL26CV12B-15LP are DMA Control, State Machine Control, High Speed Graphics Processing, Standard Logic Speed Upgrade.
Parametrics
GAL26CV12B-15LP absolute maximum ratings: (1)Supply voltage VCC:–0.5V to +7V; (2)Input voltage applied:–2.5V to VCC +1.0V; (3)Off-state output voltage applied:–2.5V to VCC +1.0V; (4)Storage Temperature:–65℃ to 150℃; (5)Ambient Temperature with Power Applied:–55℃ to 125℃.
Features
GAL26CV12B-15LP features: (1)7.5 ns Maximum Propagation Delay; (2)Fmax = 142.8 MHz; (3)4.5ns Maximum from Clock Input to Data Output; (4)TTL Compatible 16 mA Outputs; (5)UltraMOS Advanced CMOS Technology; (6)active pull-ups on all pins; (7)low power cmos:90 mA Typical Icc; (8)Reconfigurable Logic; (9)Reprogrammable Cells; (10)100% Tested/100% Yields; (11)High Speed Electrical Erasure (<100ms); (12)20 Year Data Retention; (13)Uses Standard 22V10 Macrocells; (14)Maximum Flexibility for Complex Logic Designs; (15)electronic signature for identification; (16)preload and power-on reset of registers:100% Functional Testability.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||
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 GAL26CV12B-15LP |
Lattice |
SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD |
Data Sheet |
Negotiable |
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GAL26CV12B-15LPI |
Lattice |
SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD |
Data Sheet |
Negotiable |
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